Projects, Thesis, Final Year Projects, IT, MBA, Seminar


This paper introduces, a new intelligent hardware module suitable for the computation of an adaptive median filter is presented for the first time. The function of the proposed circuit is to detect the existence of impulse noise in an image neighborhood and apply the operator of the median filter only when it is necessary. The noise detection procedure can be controlled so that a range of pixel values is considered as impulse noise. In this way, the blurring of the image in process is avoided, and the integrity of edge and detail information is preserved. Experimental results with real images demonstrate the improved performance. The proposed digital hardware structure is capable to process gray-scale images of 8-bit resolution and is fully pipelined, whereas parallel processing is used in order to minimize computational time. In the presented design, a 3x3 or 5x5 pixel image neighborhood can be selected for the computation of the filter output. However, the system can be easily expanded to accommodate windows of larger sizes. The proposed digital structure was designed, compiled and simulated using the Modelsim and Synthesized in Xilinx VERTEX-11. For the implementation of the system the PF10K200SRC240-1 field-programmable gate array device of the FLEX10KE device family is utilized, and it can be used in industrial imaging applications where fast processing is required. The typical clock frequency is 65 MHz.Index Terms-Field-programmable gate arrays (FPGAs), impulse noise, median filter, real-time filtering.

Projects, Thesis, Final Year Projects, IT, MBA, Seminar

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