Projects, Thesis, Final Year Projects, IT, MBA, Seminar

MODELING IP-ATM GATEWAY USING M/G/1/N QUEUE - Paper Presentation And PPT



1.In the seminar an M/G/1/N  model for studying the performance of an IP-ATM gate way with finite buffers is presented.2.The performance of IP-ATM gate way as a function of buffer size is studied through analysis of the proposed model.3.The accuracy of the proposed model is verified through simulation.An IP-ATM gateway with finite buffers is modeled As an M/G/1/N queue as shown in figure . A finite Buffer of size N-1 is associated with single server.The server here represents an ATM VC .The packet arrival process to the queue is poisson with a mean arrival rate of .This service time has a general distribution G with a mean of 1/ ,where  is the mean service rate.The packets from the buffer are served in a first-in-first-out (FIFO) order.Packets arriving at a full buffer are dropped and are lost from the system.

Projects, Thesis, Final Year Projects, IT, MBA, Seminar

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