Projects, Thesis, Final Year Projects, IT, MBA, Seminar


A chip architecture that integrates a fingerprint sensor and an identifier in a single chip is proposed. The Fingerprint identifier is formed by an array of pixels, and each pixel contains a sensing element and a Processing element. The sensing element senses capacitance formed by a finger surface to capture a Fingerprint image. Identification is performed by the pixel-parallel processing of the pixels. The sensing element is built above the processing element in each pixel. The chip architecture realizes a wide-area sensor without a large increase of chip size and ensures high sensor sensitivity while maintaining a high image density. The sensing element is covered with a hard film to prevent physical and chemical degradation and surrounded by a ground wall to shield it. The wall is also exposed on the chip surface to protect against damage by electrostatic discharges from the finger contacting the chip. A 15* 15 mm2 single-chip fingerprint
Sensor/identifier LSI uses 0.5um standard CMOS with the sensor process. The sensor area is 10.1 * 13.5 mm2: The sensing and identification time is 102 ms with power consumption of 8.8 mW at 3.3 V. Five hundred tests confirmed a stranger-rejection rate of the chip of more than 99% and a user-rejection rate of less than 1%.

Projects, Thesis, Final Year Projects, IT, MBA, Seminar

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